How To Make A CPU

Source: How To Make A CPU, RobertElderSoftware, 1:40, uploaded 2021-11-04, playlist index 1099.

Robert Elder presents CPU fabrication as an “any% speedrun glitchless”. The list begins with a rock and ends with package pins connected to pads on a silicon die. In 100 seconds, each sentence crosses a large industrial step, so the humour depends on the distance between the instruction and the work it names.

A geological opening

The first instruction is to get a rock and smash it. The video says this produces 98% concentrated silicon dioxide, which must be purified to 99.9% silicon dioxide and then to 99.9999999% polysilicon metal. The description uses the same figures and calls the material polysilicon metal.

The purified silicon goes into a crucible and is heated to 1,698 K. A small seed monocrystal is dipped into the molten silicon and pulled out slowly as it cools. That produces a monocrystal of pure silicon, which is cut into thin slices. The slices become silicon wafers. The video adds an optional doping step with boron, phosphorus, or another dopant before the patterning begins.

Photolithography and repeated surfaces

The wafer receives a layer of photoresist. A chromium-etched photolithographic quartz mask carries the desired circuit pattern. A laser shines through the mask onto the wafer, and the mask’s shadows control highly localised chemical reactions at the silicon surface. The result depends on whether the process uses positive or negative photoresist.

The exposed photoresist is developed, the exposed parts of the wafer are acid-etched, and the leftover resist is washed away. The video then compresses the real length of fabrication into a single breath: countless repetitions of homoepitaxy, heteroepitaxy, pseudoepitaxy, diffusion doping, copper interconnects, chemical mechanical polishing, photoresist application, acid etching, and photomask exposure build the desired features on the wafer.

This is the point at which the title’s scale becomes clear. The CPU emerges through repeated surface treatments and patterning steps. The video gives the process order and its vocabulary, whilst leaving the circuit design inside the mask and the details of each factory operation outside the frame.

From wafer to package

Once the wafer is finished, it is cut into pieces. Each piece is an unpackaged silicon die. The next task is to locate the pads on the chip and attach bond wires, or to use the flip-chip method that the description associates with most modern processors.

Bond wires or solder balls then provide the electrical connection between the pins on the chip package and the pads on the silicon die. The video ends there, with the package as the visible object that can be installed in a computer.

The limits of the speedrun

The video is a compact map of the physical route from raw silicon to a packaged die. It gives the stated purity targets and heating temperature without citing a source, and its 100-second form leaves out transistor design, the number and geometry of the layers, factory equipment, contamination control, yield, testing, and the work that turns a circuit specification into the photomask. Those omissions belong to the format. The source’s achievement is the compressed order of operations, from crushed rock through wafer patterning to electrical packaging.

Further reading / references

• Text-based version of the video, linked in the video’s description.